Semiconductor devices provided with a structure for increasing the breakdown voltage have been known, as disclosed, e.g., in Japanese Laid-Open Patent Publication No. 2000-243978. Specifically, this publication relates to providing a highly reliable high voltage semiconductor device which does not exhibit degradation of the breakdown voltage (or withstand voltage) of its pn junction under a high temperature bias reliability test. The semiconductor device disclosed in the publication includes a p-type diffusion region and an n-type diffusion region formed on an n-type semiconductor substrate, first layer plate electrodes disposed on an oxide film between these diffusion regions, and second layer plate electrodes disposed on an interlayer insulating film on the first layer plate electrodes. Thus, these plate electrodes are arranged over the pn junction and capacitively coupled to one another, thereby increasing the breakdown voltage of the pn junction.
Other prior art includes Japanese Laid-Open Patent Publication No. H06-216231.
Incidentally, the present inventor has intensively studied the configurations of semiconductor devices, such as ICs (integrated circuits), having a plurality of different potential regions therein in order to increase the breakdown voltage of the devices, and found the following:
FIG. 10 is a cross-sectional side view of a semiconductor device, and will be used to describe the problem sought to be solved by the present invention. The semiconductor device shown in FIG. 10 is provided with a substrate 1, an insulating layer 20, and a plurality of regions 3 of different potentials. The semiconductor substrate 1 is a so-called SOI (silicon on insulator) wafer including a semiconductor material layer 10 and the insulating layer 20, which is an SiO2 insulating film. The regions 3 are island regions on this SOI wafer which are separated and isolated from each other. In the following description, the plurality of regions 3 are denoted by reference numerals 3(0), 3(1), . . . , 3(k), 3(k+1), . . . 3(n), and 3(n+1) to distinguish them, where k and n are positive integers. (That is, there are n+2 number of regions 3.)
These different potential regions 3(0) to 3(n+1) are separated and isolated by trenches. The n intermediate regions 3(1) to 3(n) disposed between the rightmost region 3(0) and the leftmost region 3(n+1), as viewed in FIG. 10, are floating regions which are in a floating state and are of substantially the same configuration. These floating regions 3(1) to 3(n) are also hereinafter referred to collectively as the floating regions 3(k) for convenience of explanation, that is, k is a positive integer from 1 to n. As shown in FIG. 10, a potential of 0 (V) is applied to the rightmost region 3(0) and a potential of Vn+1(V) is applied to the leftmost region 3(n+1). The voltage (or potential difference) between the rightmost and leftmost regions 3(0) and 3(n+1) is capacitively divided so that the regions 3(1) to 3(n) are at different potentials. The potentials of the regions 3(1) to 3(n) are designated by V1, V2, . . . , Vk, . . . , Vn, respectively. Thus, as shown in FIG. 10, the high voltage Vn+1 between the regions 3(0) and 3(n+1) is capacitively divided by the capacitances formed between the regions 3(0) to 3(n+1), thereby increasing the overall breakdown voltage of the device.
However, the present inventor has found that the above breakdown voltage increasing method using a capacitive divider has the following disadvantage:
FIG. 11 is an equivalent circuit diagram of the structure of FIG. 10. Let ak represent the capacitance between the region 3(k) and the substrate, and bk represent the capacitance between the region 3(k) and the region 3(k+1), where k is 0 or a positive integer. Then the following relations hold:
                                                        b              1                        ⁡                          (                                                V                  2                                -                                  V                  1                                            )                                =                                                    b                c                            ⁢                              V                1                                      +                                          a                1                            ⁢                              V                1                                                    ⁢                                  ⁢                                            b              k                        ⁡                          (                                                V                                      k                    +                    1                                                  -                                  V                  k                                            )                                =                                                    b                                  k                  -                  1                                            ⁡                              (                                                      V                    k                                    -                                      V                                          k                      -                      1                                                                      )                                      +                                          a                k                            ⁢                              V                k                                                                        (        1        )                                                      b            k                    ⁡                      (                                          V                                  k                  +                  1                                            -                              V                k                                      )                          =                                            b              0                        ⁢                          V              1                                +                                    ∑                              j                =                1                            k                        ⁢                                          a                j                            ⁢                              V                j                                                                        (        2        )            
If ak and bk are constant with respect to the value of k and are represented by a and b respectively, then the following equations hold
                              α          =                                    2              +                              a                /                b                            +                                                                                          {                                              a                        /                        b                                            }                                        2                                    +                                      4                    ⁢                                          a                      /                      b                                                                                            2                          ⁢                                  ⁢                  β          =                                    2              +                              a                /                b                            -                                                                                          {                                              a                        /                        b                                            }                                        2                                    +                                      4                    ⁢                                          a                      /                      b                                                                                            2                          ⁢                                  ⁢                              V            k                    =                                    (                                                                    (                                                                  α                                                  k                          -                          1                                                                    -                                              β                                                  k                          -                          1                                                                                      )                                    ⁢                                      V                    2                                                  +                                                      (                                                                  α                        ⁢                                                                                                  ⁢                                                  β                                                      k                            -                            1                                                                                              -                                              β                        ⁢                                                                                                  ⁢                                                  α                                                      k                            -                            1                                                                                                                )                                    ⁢                                      V                    1                                                              )                        /                          (                              α                -                β                            )                                      ⁢                                  ⁢                                            V              2                        =                                          (                                  2                  +                                      a                    /                    b                                                  )                            ⁢                              V                1                                              ,                      and            ⁢                                                  ⁢            therefore                          ⁢                                  ⁢                              V            k                    =                                                    V                1                            ⁡                              (                                                      α                    k                                    -                                      β                    k                                                  )                                      /                          (                              α                -                β                            )                                                          (        3        )            
Since α>1 and β<1, Vk increases substantially proportionally with αk. This means that if ak and bk (or a and b) are constant with respect to the value of k, it is theoretically impossible to equalize the voltages between adjacent regions 3(k) and 3(k+1), that is, the voltages between the regions 3(0) and 3(1), between the regions 3(1) and 3(2), and so on. It should be noted that when a<<b, Vk≈kV1. However, in the structure of FIG. 10, this condition is difficult to achieve, since ak/bk is substantially constant with respect to the value of k.
Thus, the breakdown voltage increasing method described above with reference to FIG. 10, which uses a capacitive divider made up of successively arranged floating regions 3(k), is disadvantageous in that the voltages between adjacent floating regions 3(k) are not equal and increase with decreasing distance from the high potential end of the device. As a result, different voltage stresses are applied to the separation trenches, resulting in a reduced overall breakdown voltage and reduced reliability.
The present invention has been made to solve the above problems. It is, therefore, an object of the present invention to provide a semiconductor device wherein the differences between the voltages between a plurality of adjacent floating regions are reduced.